1. Field of the Invention
The present invention relates to charge-coupled devices and more particularly, to the fabrication of a charge-coupled imaging device with a three-dimensional trench structure to achieve a high effective sensing and storage area with a small cell layout area.
2. Description of the Prior Art
The charge-coupled device (CCD) has become an increasingly important component of semiconductor technology. A CCD is a dynamic device which transports charge along a given predetermined path under the control of timed clock signals or pulses. Charge-coupled devices can be used in a variety of applications including memory applications, logic function applications, signal processing applications, image acquisition and image processing applications.
FIG. 1 illustrates a conventional CCD 10 that is made by using an overlapping electrode gate structure. The CCD 10 includes alternating polycrystalline silicon electrodes 12, 14, 16, and 18 and polysilicon electrodes 20, 22, 24, 26 and 28, with a layer of silicon dioxide 30 interposed between the electrodes and a silicon substrate 32. The charge is stored and transferred along the semiconductor oxide interface, which is a two-dimensional surface parallel to the substrate.
For high resolution imagers employing the CCD, the CCD cell size, in terms of layout area, has to be scaled down to achieve high pixel count per unit imaging area in order to keep total chip area under a manageable size with a reasonable yield. As shown above, CCDs currently fabricated have a two-dimensional configuration, such that the charge storage capacity and the light sensitive area are directly proportional to the layout area of the CCD cell on the surface of the silicon substrate. Therefore, a high resolution CCD image is achieved at the expense of a smaller total charge storage capacity and light sensitivity because of the down scaling of the CCD cell layout area.
U.S. Pat. No. 4,234,887 to Vanderslice, Jr. discloses a technique for increasing the charge storage capacity per unit area of a CCD imaging device. The disclosed device includes a plurality of parallel V shaped grooves etched into a semiconductor substrate. The grooves are electrically isolated from each other by intervening strips of relatively thick field oxide. A plurality of isolated electrodes are provided orthogonally to the etched recesses such that a shift register structure is formed which extends along the length of each recess. In operation, the packets of charge are transferred by potential wells formed by the electrodes entirely within the grooves. The use of the sidewalls of the grooves to transfer charge results in a certain amount of area reduction. However, the V-grooved CCD has a fixed cross-sectional aspect ratio, as any increase of storage capacity is accompanied by an increase of the planar device area.
The use of a rectangular trench for transporting charge is shown in U.S. Pat. No. 4,760,273 in which a vertical charge transfer trench having an electrode formed therein is disclosed as part of a charge sweep device (CSD). The CSD is coupled to a conventional planar CCD. Also of interest are trench storage capacitors used in one-transistor DRAMs, in which charge is stored and read out from the same capacitor.